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Magazine Name : Ieee Transactions On Very Large Scale Intergration (Vlsi) Systems

Year : 1998 Volume number : 06 Issue: 04

Introduction To Low -Power Electronics And Design . (Article)
Subject:
Author: E. H. M Sha      A Chandrasakan     
page:      518 - 519
Cycle-Arccurate Macro-Models For Rt-Level Power Analysis. (Article)
Subject: Cycle-Accurate , Low Power
Author: Q Qiu      Q Wu     
page:      520 - 528
Formalized Metholdology For Data Reuse Exploration Fo Low-Power Hherarchical Memory Mappings. (Article)
Subject: Memory , Low-Power Design
Author: J. P Diguest      F. V. M Catthoor     
page:      529 - 537
Simulataneious Power Supply, Threshold Voltage, And Transistor Size Optimization For Low Powr Operation Of Cmos Circuits. (Article)
Subject: Low-Power Design
Author: V. K De      P Pant     
page:      538 - 545
Low-Power Realization Of Fir Filters On Progammable Dsp'S. (Article)
Subject: Finite Impulse Response (Fir)Filters , Low-Power Design
Author: M Mehendale      S. D Sherlekar     
page:      546 - 553
Power Optimization Of Core-Baed Systems By Address Bus Encoding. (Article)
Subject: Bus Encoding , Integrated Circuit
Author: G. De Micheli      L Benini     
page:      554 - 562
Modeling And Comparaing Cmos Implementatins Of The C-Element. (Article)
Subject: Energy Dissipation
Author: J. C Ebergen      M Shams     
page:      563 - 567
Working-Zone Encoding Forreducing The Energy In Microprocessor Address Buses. (Article)
Subject: Address Bus , Encoding For Low Power
Author: T Lang      E Musoll     
page:      568 - 572
Lvdcsl: A High Fan-In, High -Performane, Low-Voltage Diferential Current Switch Logic Family. (Article)
Subject:
Author: D Somasekhar      K Roy     
page:      573 - 577
Robust Rtl Power Macromodels. (Article)
Subject: Cell-Based Power Estimation
Author: A Bogliolo      L Benini     
page:      578 - 581
Ilp-Based Cost Optimal Dsp Syntesis With Module Selection And Data Format Conversion. (Article)
Subject: Data Format Conversion
Author: L. E Lucke      K Ito     
page:      582 - 594
Synthesis Of Folded Piplined Architecutres For Multirate Dsp Algorithms (Article)
Subject: Data Flow Graphs , High-Level Synthesis Parallel
Author: T. C Denk      K.K Parhi     
page:      595 - 607
Integration Of Hierachicla Test Generation With Behavioral Synthesis Of Controller And Data Circuits. (Article)
Subject: Controller /Data Path Testing
Author: S Bhatia      N. K Jha     
page:      608 - 619
Redundancy Revisited. (Article)
Subject:
Author: J Savir     
page:      620 - 624
Interleaving Buffer Insertion And Transistor Sizing Into A Single Optimization. (Article)
Subject: Buffer Instertion , Elmore Delay
Author: Y Jiang      S.S Sapantnekar     
page:      625 - 633
On Circuit Clustering For Area/Delay Tradeoff Under Capacity And Pin Constraints. (Article)
Subject: Delay , Clustering
Author: H. H Chuang      J. D Huang     
page:      634 - 642
The Design And Verificatin Of A High-Performance Low-Control-Overhead Asynchronous Diferential Equaltin Solver. (Article)
Subject: Asynchoronous Design , Average-Case Optimization
Author: V Vakilotojar      K.Y Yun     
page:      643 - 655
On-Line Fault Detectin For Bus-Based Field Progammbble Gat Arrays. (Article)
Subject: Digital Systems Fault Tolerance
Author: W. H Mangione      N. R Shnidman     
page:      656 - 666
Efficient Test-Point Selection For Scan-Based Bist. (Article)
Subject: Built-In-Test (Bist) , Test Point
Author: H. C Tsai      K. T Cheng     
page:      667 - 676
Hight-Level Address Optimization And Synthesis Techniques For Data-Transfer-Intrsive Applications. (Article)
Subject: Arithmetic Unit
Author: M. A Miranda      F. V. M Catthoor     
page:      677 - 686
Low Power And High-Quality Signal Transmission Baseband Lsic For Personal Communications. (Article)
Subject:
Author: S Kubota      K Kobayashi     
page:      687 - 696
Synthesis Of Area-Efficient And High-Throughput Rate Data Format Converters. (Article)
Subject:
Author: V. K Prasanna      J Bae     
page:      697 - 706
Algorithm -Based Low-Power Transforms Coding Architectures: The Multirate Approach. (Article)
Subject:
Author: K. J. R Liu      A. Y Wu     
page:      707 - 718
Scheduling Of Uniform Multidimensional Systems Underresoruces Constraints. (Article)
Subject:
Author: N. L Passos      E. H. M Sha     
page:      719 - 730
Imcorpipelined Asynchronous Discreate Cosine Trasform 9dct/Idct) Processor. (Article)
Subject:
Author: V Akella      D Johnson     
page:      731 - 740